The present invention relates to logic circuits, more particularly, to voltage level translator circuits for translating the level of an applied input logic signal to a second level logic output signal.
Present logic level translator circuits typically employ a push-pull output driver stage which is comprised of an upper Darlington transistor amplifier series connected at the ouput of the circuit to a lower transistor amplifier between a DC voltage supply. In operation, in response to the input logic signal being in a first level state, the Darlington transistor amplifier, for instance, is turned-on to source current to the output of the circuit. When the input logic state transitions to a second level, the lower amplifier is turned-on while the Darlington amplifier is turned-off whereby current is sourced from the output of the circuit. Thus, an output logic signal having a high state and a low state is produced to a load that is coupled to the output of the circuit. Depending on the current gain of the Darlington amplifier and the relative impedance of the load, the output logic signal can have a larger voltage swing than the input logic signal, i.e., a higher logic level.
Most, if not all, of the above described prior art circuits are limited to the amount of voltage level shift that can be produced when large current requirements are needed. Although the Darlington configuration can supply large output load currents the offset voltages developed there across in addition to other circuit parameters typically limits the voltage that can be developed across the load to a value generally two or more volts less than the D.C. supply voltage potential. Moreover, some prior art circuits dissipate considerable power when the circuit is in a low logic state.
Hence, there is a need for a translator circuit of the type above that can supply large load currents (20ma or more) while maximizing the voltage level swing at the output and reducing power dissipation in the circuit. Additionally, in conjunction with the foregoing, such a translator circuit should not introduce any undesirable side effects such as power supply current spikes and/or poor waveform quality.
Accordingly it is an object of the present invention to provide an improved logic level translator circuit.
It is also an object of the present invention to provide a logic level translator circuit suitable for manufacturer in integrated circuit form.
Still another object of the present invention is to provide an integrated logic level translator circuit having improved high drive state for producing maximum voltage level shift with large current drive.
An additional object of the present invention is to provide an integrated logic level translator circuit which can supply large load current and maximum voltage level shift without introducing undesirable characteristics such as high DC power dissipation, power supply current transients and distorted waveform quality.